Commit a027a138 by Anirudh Mohan Kaushik

initial commit

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Too many changes to show.

To preserve performance only 1000 of 1000+ files are displayed.

syntax: glob
build
parser.out
parsetab.py
cscope.files
cscope.out
*.pyc
*~
.*.swp
m5out
src/doxygen
ext/dramsim2/DRAMSim2
ext/mcpat/regression/*/*.out
6b99127531fd692ff0f202e327d0826ed2bfcf5f m5_1.0_beta1
1a40e60270c11ec24f11c783e70367e2740cdc56 m5_1.0_beta1
069849384988e553b6edae71ecaf1fb6e918d738 m5_1.0_beta2
4cfa92eca35d532b339507f1c631e1986d87b258 m5_1.0_tutorial
ffe1942d845c67fb3fd04692420c9433638eba13 m5_1.0_web
af8bf5e4e85ba1a773183cc3f6c43bcdf0ce146a m5_1.1
1c0eeb0dae9b6a2a5479faf3ab52fb1ed0ce703f m5_1.1
c486924ed90eb6805e8cf44ddee5ad5435c79051 m5_1.1
01e679b66ca9474f10f8f96d391693adf76fc73a m5_1.1
2608cd7def85c9fdc84251295c8023fab990d530 m5_1.1
cdd48642d9bf584bd445b40abec9e7f934a5900b m5_1.1
8d690c7c2efced99f7991b7ace56d769bae7cfdd m5_2.0_beta1
d83885ad2b41777c97b94882aa8f07e761e55ac1 m5_2.0_beta1_patch1
1906dcace7c27b2153bfb95ca1218660e1cc1f70 m5_2.0_beta2
b174ae14f007ba0c341f8df77d36f57f48369cc8 m5_2.0_beta2
91a9ac67662aa3a79315ade29b17a85961fecd88 m5_2.0_beta3
dce5a8655829b7d2e24ce40cafc9c8873a71671f m5_2.0_beta5
1ac44b6c87ec71a8410c9a9c219269eca71f8077 m5_2.0_beta4
60a931b03fb165807f02bcccc4f7d0fd705a67a9 copyright_update
d8b246a665c160a31751b4091f097022cde16dd7 m5_2.0_beta6
5de565c4b7bdf46670611858b709c1eb50ad7c5c Calvin_Submission
549b72de8f725bd411a9c73ee0d15ccbdf47bb0f stable_2012_02_02
f75ee4849c404a0c7d93413f443cec640b721f2f stable_2012_06_28
07352f119e489452b3c0bbf6d4f70e21e80e17e3 stable_2013_06_16
6a043adb1e8d67fbb03ac5cee58dd26f75663714 stable_2013_10_14
459491344fcf7f9e29250e71f33a7c7150f54d64 stable_2014_02_15
cb2e6950956d475da97b04c41f19769ce2e8541a stable_2014_08_26
bdb307e8be54a5808a9af2537e9261d88de6ed1b stable_2014_12_14
e1794974515011f81f8d0fda7543ba3360a12c9b stable_2015_04_15
Please see individual files for details of the license on each file.
The preferred license can be found in LICENSE.
All files in this distribution (other than in the ext directory) have
licenses based on the BSD or MIT licenses. Some files in the ext
directory are GNU LGPL. No other licenses are found in this
distribution.
Beyond the BSD license, some files include the following clarification
of the license as required by the copyright holder:
The license below extends only to copyright in the software and
shall not be construed as granting a license to any other
intellectual property including but not limited to intellectual
property relating to a hardware implementation of the
functionality of the software licensed hereunder. You may use the
software subject to the license terms below provided that you
ensure that this notice is replicated unmodified and in its
entirety in all distributions of the software, modified or
unmodified, in source code or in binary form.
The copyright holders include (not counting the ext directory):
Copyright (c) 2000-2011 The Regents of The University of Michigan
Copyright (c) 1990,1993-1995,2007-2010 The Hewlett-Packard Development Company
Copyright (c) 1999-2009,2011 Mark D. Hill and David A. Wood
Copyright (c) 2009-2011 ARM Limited
Copyright (c) 2008-2009 Princeton University
Copyright (c) 2007 MIPS Technologies, Inc.
Copyright (c) 2009-2011 Advanced Micro Devices, Inc.
Copyright (c) 2009 The University of Edinburgh
Copyright (c) 2007-2008 The Florida State University
Copyright (c) 2010 Massachusetts Institute of Technology
Copyright (c) 1990-1993 The Regents of the University of California
Copyright (c) 2006-2009 Nathan Binkert
Copyright (c) 2001 The NetBSD Foundation, Inc.
Copyright (c) 2010-2011 Gabe Black
Copyright (c) 1994 Adam Glass
Copyright (c) 1990-1992 MIPS Computer Systems, Inc.
Copyright (c) 2004 Richard J. Wagner
Copyright (c) 2000 Computer Engineering and Communication Networks Lab
Copyright (c) 2001 Eric Jackson
Copyright (c) 1990 Hewlett-Packard Development Company
Copyright (c) 1994-1996 Carnegie-Mellon University.
Copyright (c) 1993-1994 Christopher G. Demetriou
Copyright (c) 1997-2002 Makoto Matsumoto and Takuji Nishimura
Copyright (c) 1998,2001 Manuel Bouyer.
Copyright (c) <date> <copyright holder>
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met: redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer;
redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution;
neither the name of the copyright holders nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
This is the gem5 simulator.
The main website can be found at http://www.gem5.org
A good starting point is http://www.gem5.org/Introduction, and for
more information about building the simulator and getting started
please see http://www.gem5.org/Documentation and
http://www.gem5.org/Tutorials.
To build gem5, you will need the following software: g++ or clang,
Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4,
and lastly protobuf if you want trace capture and playback
support. Please see http://www.gem5.org/Dependencies for more details
concerning the minimum versions of the aforementioned tools.
Once you have all dependencies resolved, type 'scons
build/<ARCH>/gem5.opt' where ARCH is one of ALPHA, ARM, NULL, MIPS,
POWER, SPARC, or X86. This will build an optimized version of the gem5
binary (gem5.opt) for the the specified architecture. See
http://www.gem5.org/Build_System for more details and options.
With the simulator built, have a look at
http://www.gem5.org/Running_gem5 for more information on how to use
gem5.
The basic source release includes these subdirectories:
- configs: example simulation configuration scripts
- ext: less-common external packages needed to build gem5
- src: source code of the gem5 simulator
- system: source for some optional system software for simulated systems
- tests: regression tests
- util: useful utility programs and files
To run full-system simulations, you will need compiled system firmware
(console and PALcode for Alpha), kernel binaries and one or more disk
images. Please see the gem5 download page for these items at
http://www.gem5.org/Download
If you have questions, please send mail to gem5-users@gem5.org
Enjoy using gem5 and please share your modifications and extensions.
TARGET_ISA = 'alpha'
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU'
PROTOCOL = 'MI_example'
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU'
PROTOCOL = 'MESI_Two_Level'
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU'
PROTOCOL = 'MOESI_CMP_directory'
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU'
PROTOCOL = 'MOESI_CMP_token'
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU'
PROTOCOL = 'MOESI_hammer'
TARGET_ISA = 'alpha'
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU'
PROTOCOL = 'MSI_Snooping_One_Level_RT'
RUBY = True
SS_COMPATIBLE_FP = 1
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU'
PROTOCOL = 'Network_test'
TARGET_ISA = 'arm'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,MinorCPU'
PROTOCOL = 'MI_example'
TARGET_ISA = 'mips'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
PROTOCOL = 'MI_example'
TARGET_ISA = 'null'
CPU_MODELS = ''
PROTOCOL='MI_example'
TARGET_ISA = 'power'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
PROTOCOL = 'MI_example'
TARGET_ISA = 'sparc'
CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
PROTOCOL = 'MI_example'
TARGET_ISA = 'x86'
CPU_MODELS = 'AtomicSimpleCPU,O3CPU,TimingSimpleCPU,InOrderCPU'
PROTOCOL = 'MI_example'
TARGET_ISA = 'x86'
CPU_MODELS = 'AtomicSimpleCPU,O3CPU,TimingSimpleCPU'
PROTOCOL = 'MI_example'
FULL_SYSTEM = True
TARGET_ISA = 'x86'
CPU_MODELS = 'TimingSimpleCPU,O3CPU,AtomicSimpleCPU'
PROTOCOL = 'MESI_Two_Level'
TARGET_ISA = 'x86'
CPU_MODELS = 'AtomicSimpleCPU,O3CPU,TimingSimpleCPU'
PROTOCOL = 'MI_example'
TARGET_ISA = 'x86'
CPU_MODELS = 'TimingSimpleCPU,O3CPU,AtomicSimpleCPU'
PROTOCOL = 'MOESI_CMP_directory'
TARGET_ISA = 'x86'
CPU_MODELS = 'TimingSimpleCPU,O3CPU,AtomicSimpleCPU'
PROTOCOL = 'MOESI_hammer'
TARGET_ISA = 'x86'
CPU_MODELS = 'TimingSimpleCPU,O3CPU,AtomicSimpleCPU,InOrderCPU'
PROTOCOL = 'MSI_Snooping'
TARGET_ISA = 'x86'
CPU_MODELS = 'TimingSimpleCPU,O3CPU,AtomicSimpleCPU'
PROTOCOL = 'MSI_Snooping_One_Level_RT'
#!/bin/sh
cd /benchmarks/spec/ammp00/
/sbin/m5 checkpoint 0 0
/sbin/m5 checkpoint 100000000 200000000
/sbin/m5 loadsymbol
/sbin/m5 resetstats
./ammp < input/mdred.in
/sbin/m5 exit
000000012001da40 T AMMPmonitor
000000012001dfc0 T AMMPmonitor_mute
0000000120034338 D _DYNAMIC
00000001200346c8 D _GLOBAL_OFFSET_TABLE_
0000000120034d60 G _IO_stdin_used
0000000120034500 T _PROCEDURE_LINKAGE_TABLE_