ModuleDecl.cpp 8.91 KB
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#include "ModuleDecl.h"
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#include <string>
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using namespace scpar;

using std::string;

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ModuleDecl::ModuleDecl() : module_name_{"NONE"},
                           class_decl_{nullptr},
                           constructor_stmt_{nullptr} {}
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ModuleDecl::ModuleDecl(const string &name, CXXRecordDecl *decl)
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    : module_name_{name}, class_decl_{decl} {}
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ModuleDecl::~ModuleDecl() {
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  class_decl_ = nullptr;
  constructor_stmt_ = nullptr;

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  // Delete all pointers in ports.
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  for (auto input_port : _iports) {
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    // Second is the PortDecl*.
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    delete input_port.second;
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  }
  _iports.clear();

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  for (auto output_port : _oports) {
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    // Second is the PortDecl*.
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    delete output_port.second;
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  }
  _oports.clear();

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  for (auto io_port : _ioports) {
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    // Second is the PortDecl*.
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    delete io_port.second;
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  }
  _ioports.clear();
}

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void ModuleDecl::setTemplateParameters(const vector<string> & parm_list) {
    template_parameters_ = parm_list;
}

vector<string> ModuleDecl::getTemplateParameters() const {
    return template_parameters_; }

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void ModuleDecl::setModuleName(const string &name) { module_name_ = name; }
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void ModuleDecl::addInstances(const vector<string> & instanceList) {
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  _instanceList = instanceList;
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}

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void ModuleDecl::addSignalBinding(map<string, string> portSignalMap) {
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  _portSignalMap.insert(portSignalMap.begin(), portSignalMap.end());
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}

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void ModuleDecl::addSignals(const FindSignals::signalMapType & signal_map) {
  for (auto sit : signal_map) {
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    string name = sit.first;
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    // It is important to create new objects.
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    // This is because the objects created during Find*
    // may go outside scope, and free up allocated memory.
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    SignalContainer *sc{ new SignalContainer(*sit.second) };
    Signal *sig { new Signal(name, sc) };
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    _signals.insert( ModuleDecl::signalPairType(name, sig) );
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  }
}

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void ModuleDecl::addInputPorts(FindPorts::PortType p) {
  for (auto mit : p) {
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    string name = mit.first;
    FindTemplateTypes *template_type = new FindTemplateTypes(mit.second);
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    PortDecl *pd = new PortDecl(name, template_type);
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    _iports.insert(portPairType(mit.first, pd));
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  }
}

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void ModuleDecl::addOutputPorts(FindPorts::PortType p) {
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  for (auto mit : p) {
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    string n = mit.first;
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    FindTemplateTypes *tt = new FindTemplateTypes(mit.second);
    PortDecl *pd = new PortDecl(n, tt);
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    _oports.insert(portPairType(n, pd));
  }
}

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void ModuleDecl::addInputOutputPorts(FindPorts::PortType p) {
  for (auto mit : p) {
    _ioports.insert(
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                    portPairType(mit.first, new PortDecl(mit.first, mit.second)));
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  }
}

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void ModuleDecl::addInputInterfaces(FindTLMInterfaces::interfaceType p) {
  for (auto mit : p) {
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    string n = mit.first;
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    FindTemplateTypes *tt = new FindTemplateTypes(mit.second);
    InterfaceDecl *pd = new InterfaceDecl(n, tt);
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    _iinterfaces.insert(interfacePairType(mit.first, pd));
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  }
}

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void ModuleDecl::addOutputInterfaces(FindTLMInterfaces::interfaceType p) {
  for (auto mit : p) {
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    string name = mit.first;
    FindTemplateTypes *tt = new FindTemplateTypes(*mit.second);
    InterfaceDecl *pd = new InterfaceDecl(name, tt);
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    _ointerfaces.insert(interfacePairType(name, pd));
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  }
}

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void ModuleDecl::addInputOutputInterfaces(FindTLMInterfaces::interfaceType p) {
  //  for (FindTLMInterfaces::interfaceType::iterator mit = p.begin(), mite =
  //  p.end();    mit != mite; mit++) {
  for (auto mit : p) {
    _iointerfaces.insert(
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                         interfacePairType(mit.first, new InterfaceDecl(mit.first, mit.second)));
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  }
}

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void ModuleDecl::addConstructor(Stmt *constructor) {
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  constructor_stmt_ = constructor;
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}

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void ModuleDecl::addProcess(FindEntryFunctions::entryFunctionVectorType *efv) {
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  _vef = *efv;
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  for (unsigned int i = 0; i < efv->size(); ++i) {
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    EntryFunctionContainer *ef = (*efv)[i];

    // Set the entry name.
    string entryName = ef->_entryName;
    string entryType = "";

    // Set the process type
    switch (ef->_procType) {
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    case PROCESS_TYPE::THREAD: {
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      entryType = "SC_THREAD";
      break;
    }
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    case PROCESS_TYPE::METHOD: {
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      entryType = "SC_METHOD";
      break;
    }
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    case PROCESS_TYPE::CTHREAD: {
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      entryType = "SC_CTHREAD";
      break;
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    }
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    default: {
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      entryType = "ERROR";
      break;
    }
    }
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    process_map_.insert(
                        processPairType(entryName, new ProcessDecl(entryType, entryName,
                                                                   ef->_entryMethodDecl, ef)));
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  }
}

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vector<string> ModuleDecl::getInstanceList() { return _instanceList; }
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vector<EntryFunctionContainer *> ModuleDecl::getEntryFunctionContainer() {
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  return _vef;
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}

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int ModuleDecl::getNumInstances() { return _instanceList.size(); }
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ModuleDecl::signalMapType ModuleDecl::getSignals() { return _signals; }

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ModuleDecl::processMapType ModuleDecl::getProcessMap() { return process_map_; }
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ModuleDecl::portMapType ModuleDecl::getOPorts() { return _oports; }
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ModuleDecl::portMapType ModuleDecl::getIPorts() { return _iports; }
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ModuleDecl::portMapType ModuleDecl::getIOPorts() { return _ioports; }
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ModuleDecl::interfaceMapType ModuleDecl::getOInterfaces() {
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  return _ointerfaces;
}

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ModuleDecl::interfaceMapType ModuleDecl::getIInterfaces() {
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  return _iinterfaces;
}

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ModuleDecl::interfaceMapType ModuleDecl::getIOInterfaces() {
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  return _iointerfaces;
}

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string ModuleDecl::getName() { return module_name_; }
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bool ModuleDecl::isModuleClassDeclNull() { return (class_decl_ == nullptr); }
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CXXRecordDecl *ModuleDecl::getModuleClassDecl() {
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  assert(!(class_decl_ == nullptr));
  return class_decl_;
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}

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void ModuleDecl::dumpInstances(raw_ostream &os, int tabn) {
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  if (_instanceList.empty()) {
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    os << " none \n";
  }

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  for (size_t i = 0; i < _instanceList.size(); i++) {
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    os << _instanceList.at(i) << " ";
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  }
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}

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void ModuleDecl::dumpSignalBinding(raw_ostream &os, int tabn) {
  if (_portSignalMap.empty()) {
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    os << " none\n";
    return;
  }

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  for (auto it : _portSignalMap) {
    os << "\nPort : " << it.first << " bound to signal : " << it.second;
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  }
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}

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void ModuleDecl::dumpProcesses(raw_ostream &os, int tabn) {
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  json process_j;
  process_j["number_of_processes"] = process_map_.size();
  for (auto pit : process_map_) {
    ProcessDecl *pd { pit.second };
    process_j[pit.first] = pd->dump_json( os );
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    }
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  os << "Processes\n";
  os << process_j.dump(4) << "\n";
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}
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void ModuleDecl::dumpInterfaces(raw_ostream &os, int tabn) {
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  os << "Input interfaces: " << _iinterfaces.size() << "\n";
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  if (_iinterfaces.size() == 0) {
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    os << " none\n";
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  } else {
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    for (auto mit : _iinterfaces) {
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      mit.second->dump(os, tabn);
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      os << "\n ";
    }
    os << "\n";
  }

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  os << "Output interfaces: " << _ointerfaces.size() << "\n";
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  if (_ointerfaces.size() == 0) {
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    os << "none \n";
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  } else {
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    for (auto mit : _ointerfaces) {
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      mit.second->dump(os, tabn);
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      os << "\n ";
    }
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    os << "\n";
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  }

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  os << "Inout interfaces: " << _iointerfaces.size() << "\n";
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  if (_iointerfaces.size() == 0) {
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    os << "none \n";
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  } else {
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    for (auto mit : _iointerfaces) {
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      mit.second->dump(os, tabn);
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      os << "\n ";
    }
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    os << "\n";
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  }
}

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void ModuleDecl::dumpPorts(raw_ostream &os, int tabn) {
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  //  os << "\nInput ports: " << _iports.size() << "\n";

  json iport_j, oport_j, ioport_j;
  iport_j["number_of_in_ports"] = _iports.size();
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    for (auto mit : _iports) {
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      iport_j[mit.first] = mit.second->dump_json(os);
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    }

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    //    os << "\nOutput ports: " << _oports.size() << "\n";
    oport_j["number_of_output_ports"] = _oports.size();
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    for (auto mit : _oports) {
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      oport_j[mit.first] = mit.second->dump_json(os);

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    }

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    //    os << "\nInout ports: " << _ioports.size() << "\n";
    ioport_j["number_of_inout_ports"] = _ioports.size();
    for (auto mit : _ioports) {
      ioport_j[mit.first] = mit.second->dump_json(os);
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    }
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    os << "Ports\n";
    os << iport_j.dump(4) << "\n" << oport_j.dump(4) << "\n"
       << ioport_j.dump(4)<< "\n";
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}

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void ModuleDecl::dumpSignals(raw_ostream &os, int tabn) {
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  json signal_j;
  signal_j["number_of_signals"] = _signals.size();
  for (auto sit : _signals) {
    Signal *s = sit.second;
    signal_j[sit.first] = s->dump_json(os);
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  }
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  os << "Signals\n";
  os << signal_j.dump(4) << "\n";
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}
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void ModuleDecl::dump(raw_ostream &os) {
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  os << "\n";
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  os << "\n# Instances:\n";
  dumpInstances(os, 4);
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  os << "# Port Declaration:\n";
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  dumpPorts(os, 4);
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  os << "\n# Signal Declaration:\n";
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  dumpSignals(os, 4);
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  os << "\n# Processes:\n";
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  dumpProcesses(os, 4);
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  os << "# Signal binding:\n";
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  dumpSignalBinding(os, 4);
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  dump_json();
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  os << "\n=======================================================\n";
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}

json ModuleDecl::dump_json() {

  json module_j;

  module_j["module_name"] = module_name_;
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  // Template parameters.
  std::cout << "\nTEMPPARM: " << template_parameters_.size() << std::endl;
  for (const auto & parm: template_parameters_) {
      module_j["template_parameters"].push_back( parm );
  }
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  std::cout << module_j.dump(4);
  return module_j;
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}